Depends on the technology. A ladder DAC is easier than a SAR ADC for the simple reason that a SAR ADC contains the DAC as a subcircuit and runs it much faster than would be necessary for a DAC.
In sigmadelta the difference is much smaller. In continuous-time sigmadelta (the sort I make) the loop filter in the ADC is more complicated than the output filter in the DAC but its noise and distortion contribution is much, much smaller. Meaning I find it harder to do a transparent DAC output filter (the ADC not having any) than a loop filter for an ADC. On the other hand, settling time must be much better controlled on the ADC end because any "intersymbol intermodulation" is going to affect the modulation process and cause any variety of whistles, tones and noise modulation.
In switched-cap sigmadelta (the ones you find on chips), the s/c output filter in a DAC has roughly the same complexity as the loop filter in an ADC. Aforementioned settling time problems are present there as well, but it's much more practical to do multilevel schemes on chip.
In short: for ladder/SAR type converters the ADC is definitely the toughest to crack. For sigmadelta converters both have their challenges and there isn't a clear difference as global complexity goes.