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Author Topic: The pros and cons of SRC for jitter reduction.  (Read 9143 times)

bruno putzeys

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Re: The pros and cons of SRC for jitter reduction.
« Reply #15 on: May 02, 2007, 02:06:35 pm »

Well that's really why I call it "instructive". The listening tests I've done haven't all been very rigorous (ie. double blind), so I prefer not to make any claims concerning what I've heard. The one that I did take time out to do a proper ABX on was half-band vs. stop-band at 0.5fs. I got 20/20 correct trials there (at 44.1kHz). Subjectively the non-half-band is clearly preferable. But then again, it's preferable objectively too as the use of a half-band for the first upsampling stage is for all intents and purposes a violation of the nyquist criterion.
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Quince

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Re: The pros and cons of SRC for jitter reduction.
« Reply #16 on: May 03, 2007, 01:41:17 am »

Yes, that's a pretty rough filter you compared to.

Perhaps a DSP to which a new filter can be uploaded is the best option, as then USB1.1 should be sufficient.  Any suitable ICs?

[Edit:] I was looking at http://www.msbtech.com/products/16xdf.php and though 16x seems pointless, they do make good points about the internal precision.  A recent fixed filter is SM5847, but that uses only 32-bit accumulators and has 2 or 3 stages for 4x and 8x.  For the 4x / 2 stage it's not so bad, but it seems inadequate for the 8x / 3 stage multiply-add.  The number of taps also seems quite low at 169.  I'm guessing the internal filter of the PCM1794 DAC is comparable.

I guess my worry about DSP is I don't have experience with them and I'm concerned about the cost of development.  Which ones are good choices with that in mind?
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Andy Peters

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Re: The pros and cons of SRC for jitter reduction.
« Reply #17 on: May 03, 2007, 07:44:14 pm »

Quince wrote on Wed, 02 May 2007 22:41

Perhaps a DSP to which a new filter can be uploaded is the best option, as then USB1.1 should be sufficient.  Any suitable ICs?


I don't think you'll find a DSP chip with a USB port (NB that I have not done an exhaustive search).

But for easy full-speed USB general-purpose interfacing, I like the Silicon Labs C8051F32x and C8051F34x devices.  Most DSPs should have some kind of port one can use for coprocessor communications (SPI, I2C) which are available on the SiLabs parts.

Quote:

I guess my worry about DSP is I don't have experience with them and I'm concerned about the cost of development.  Which ones are good choices with that in mind?


The bad news is that the development tools for most DSP families (TI and ADI) are $$$$.  However, both vendors have eval kits with a board featuring a DSP and memory and peripherals, as well as a debug kit and tools limited for use on that board.  The TI boards are about $400.

There are a couple of free assemblers for the Moto 56K parts floating around.

-a
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Quince

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Re: The pros and cons of SRC for jitter reduction.
« Reply #18 on: May 03, 2007, 11:09:40 pm »

Andy Peters wrote on Thu, 03 May 2007 16:44

I don't think you'll find a DSP chip with a USB port (NB that I have not done an exhaustive search).

You misunderstand.  I'd use a separate USB controller.  The DSP is just for the filter.

Quote:

The bad news is that the development tools for most DSP families (TI and ADI) are $$$$.

Yeah, EZKIT Lite for AD's newer SHARC chips is about $500...
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Andy Peters

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Re: The pros and cons of SRC for jitter reduction.
« Reply #19 on: May 04, 2007, 02:05:35 am »

Quince wrote on Thu, 03 May 2007 20:09

Andy Peters wrote on Thu, 03 May 2007 16:44

I don't think you'll find a DSP chip with a USB port (NB that I have not done an exhaustive search).

You misunderstand.  I'd use a separate USB controller.  The DSP is just for the filter.


Ah, then you're good.  Go with the SiLabs parts over, say, the Cypress parts ... they're cheaper and you can't beat the built-in JTAG debugger (or the real-good support).

-a
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Quince

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Re: The pros and cons of SRC for jitter reduction.
« Reply #20 on: May 04, 2007, 11:10:26 pm »

Doesn't look like the SiLabs parts have a FIFO slave endpoint capability, so I'm not sure I can implement USB Audio class asynchronous isochronous mode on one of those.
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Andy Peters

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Re: The pros and cons of SRC for jitter reduction.
« Reply #21 on: May 05, 2007, 05:09:38 pm »

Quince wrote on Fri, 04 May 2007 20:10

Doesn't look like the SiLabs parts have a FIFO slave endpoint capability, so I'm not sure I can implement USB Audio class asynchronous isochronous mode on one of those.


Ah, I see what you're doing...I thought you wanted to use the USB connection only for control.  So you're right, you can't reasonably do audio in one of the SiLabs parts.

=a
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Quince

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Re: The pros and cons of SRC for jitter reduction.
« Reply #22 on: May 08, 2007, 11:52:24 pm »

There's conflicting information about Windows support of asynchronous USB Audio endpoints. One MS document, and head-fi posts, I've seen claim XP does not support it, only Vista does. On another forum I've seen the claim that XP SP2 works fine, but Vista has issues with the way it implements it. And then there's Wavelengthaudio where it seems Win98 even supports it (!)
So... WTF?  Which is it?
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mgiammarco

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Re: The pros and cons of SRC for jitter reduction.
« Reply #23 on: December 28, 2008, 04:10:34 pm »

Hello,
I am interested too in the claim that asrc can eliminate jitter.

I have just read the great Bruno post above that confirm my suspect that resampling the input with jitter means pratically encoding the jitter in the output data (it is now superfluous that the output data have a better clock).

But I see that some products like the benchmark dac and behringer ultramatch src 2496 (I am interested in this one) use asrc for jitter reduction and I would like to ask another opinion:

- does asrc reduce jitter?;
- does asrc is better than pll?

Obviously a better solution is a dac with a good internal clock and a wordclock out but I am not finding any on the market (at a low price).

Thanks for patience!

Mario
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bruno putzeys

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Re: The pros and cons of SRC for jitter reduction.
« Reply #24 on: January 05, 2009, 03:27:24 am »

To save a lot of writing I'd like to point to a presentation I made some time ago where the behaviour of ASRC re jitter is explained.
http://www.hypex.nl/docs/Bruno%20Masterclass/slides.htm
The ASRC story starts at slide 92. The upshot is: ASRC's attenuate jitter, but only after first adding some of their own. This problem is mitigated by insuring that the ratio between input and output rates is not simple.
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