Phillip Graham wrote on Mon, 29 May 2006 21:09 |
danlavry wrote on Fri, 28 April 2006 19:37 |
I do not have much of a preference, perhaps because I am not too deeply into understanding of PC processing. I did find myself very surprised in one area regarding processing:
I looked around to see what is available now. I expected to see some significant clock speed increase. I was hoping for some 3-5GHz clock speed, at least some X2 improvement. What happened to Moor's law? I guess it broke. I see many laptop machines with clock speeds around 2GHz, and not much higher.
Yes I know, there is dual-core architecture, and that is great for multitasking and more. But I need a fast single task machine for tasks such as compiling code, math analysis... where multitasking does not help a bit.
Am I missing something?
Regards Dan Lavry
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Hey Dan, first let me say that I only read the original thread as far as your post, so my apologies if this has nothing to do with the later discussion...
In college I interned for AMD in their Austin FAB (now a part of Spansion). At the time (2001) we were making the original Athlons and flash RAM. I worked in photolithography, so I got to see a pretty complete picture of the whole process (for those that don't know, photolithography is basically every-other step in making a chip).
I was fully qualified in their online C44/50 process flow, and did several tours for VP-types of the fab, as I knew the process flow better than the other fab interns, so I have a decent background on the whole fighting moore's law thing.
I too own a IBM laptop, with a Intel chip. This is not a "go AMD" post.
There are several key limiting steps from a physics perspective in terms of chip performance. You have limits in conductor mobility at the transistor gate, transistor well density limits, gate oxide leakage current limits, parasistic capacitance issue in the metal layers.
To increase carrier mobility, you either have to shorten the gate channel width, or use a different materials system (e.g. "strained" silicon germanium substrates).
To increase the capacitive coupling of the gate oxide, you need it to be as thin as possible, but then you have large leakage currents due to tunneling. The gate oxide needs to be epitaxial though, to minimize charge traps at the depletion channel interface. This was actually the original reason for picking silicon as the substrate. It could be grown single crystal, and had a stable epitaxial gate oxide.
Finally, you have to embed each transitor in its own little oxide "box" to prevent latchup between adjacent transistors. Gate leakage and transistor to transistor leakage are both big power drains. Silicon on insulator (SOI) helps a lot with the the latter, the former is trickier. IBM, AMD, and (possibly?) Intel are now using SOI substrates in at least some capacity.
Then you have the problem of practical fabrication below 193nm lithographic techniques. Excimer sources get harder to make, spinning the photoresists thin enough to develop effectively w/ the super short wavelength lithography is extremely hard, air adsorption becomes appreciable, etc.
Then you have the problem of the electricity's speed in the metallization layers above the transistors. The capacitance of the insulating layers slows the efield propagation. This was the achilles heel of the old athlon.
Sorry, must leave this post unfinished, gotta run, will try to finish it later...
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It appears the continuation must be in a new post for the BB to bounce the continued reply to the top. I have included the initial response as a quote for clarity.
On with show...
So, as the previous post exposited, there are numerous factors in play here for the speed of the chips.
My internship with AMD ended a few weeks before 9/11, and before the planned "tape out" of the initial Athlon64 (Sledgehammer and Clawhammer). The K8/Athlon64/xxxHammer is a totally different beast, and I don't know any details about it.
Intel was totally kicking AMDs butt megahertz-wise at that time, even with some proprietary tricks AMD used to make smaller transistors. They had slow spots in the metal layers that lead down to the logic block level. Improving the speed of those chips came mostly from reworking the "back end" of the process, as the metal layers are called.
Fast-forward to today, and the latest chips. The smaller you make your transitors (the shorter the depletion channel), the faster you can pump them on and off. The better you capacitively couple the gate to the transitor, the better they respond on/off at lower voltages. The smaller you make each transitor, the more you can pack together.
Of course all those close together transistors all have "leaking" source/drain currents, gate currents, and all other mess. Pretty soon you have a BUNCH of current flowing through your chip that is not directly related to "on/off" states. If your chip has a core voltage of 2V, and is disspating 50+ watts of heat, it doesn't take a rocket scientist to see that a ton of current is flowing through the chip.
It is no longer simply a function of "make everything smaller" which has it's own set of new challenges coming into view (e.g. vacuum lithography), but also the lackluster properties of silicon/silicon dioxide, especially in heat production.
Silicon is not a direct bandgap semiconductor; the path from valence to conduction band, in reciprocal space, has a tangential component that causes phonon formation (laymans--electrons moving in silicon create packets of lattice vibrations, i.e. heat). Silicon is also not a wide bandgap semiconductor, but that is less of a concern for microprocessors. Silicon dioxide is a low K dielectric, and has a fair loss tangent. It also has less than awesome dielectric breakdown behavior.
So, you can scrap 40 years of chemistry and solid state physics invested in silicon, and try to find a replacement materials system (and many are working on this), or you can see that end of practical chips made with higher transitor density in plain silicon is drawing to a close, and start making multiple cores on the same bit of wafer. That is what is happening now.
Of course that is not a panacea either, as multiple cores makes for bigger chips, unless you also increase the transitor density. So, in the end there is no free lunch, and silicon, as a semiconductor system, is pretty long in the tooth.
I think many of these problems have really come to a head for the manufacturers in the past couple years. AMD has been able to catch up somewhat in terms of fabrication ability in recent times, and intel is hampered, currently, but several less than stellar chip architectures.
Please feel free to ask any questions these messages have spurred.
As a bit of spin to an otherwise highly technical post, I would put my .02 in here and say that i feel AMD, at THIS time, is making a superior product to Intel. I don't have any AMD or intel stock, and several of my close friends work for intel, so I am not saying that out of blind enthusiasm for my past employer. AMD certainly has not always been in this position, and I am glad to see their success, as well as competition in the industry, which only benefits the consumers.
As a final useful bit for all you DIY PC people out there, AMDs internal reference motherboards for testing (in 2k1) were built by Tyan, because they had the best motherboard design/quality by AMDs judgement.